Engineers or technicians responsible for designing, verifying and implementing the analog and mixed signal sections of systems on-chip. These sections comprise conditioning circuits, analog processing tasks (amplification, filtering, etc.) and A-to-D and D-to-A signal conversion. Tasks may also involve programmable gain amplifiers, buffers, internal reference generators (bandgaps, regulators, etc.), data converters (A / D and D / A), frequency synthesizers, and interface hardware (I/O pads, ESD protections, LVDS, etc.). A thorough knowledge of EDA tools is essential.
This profile requires engineers with more than 10 years’ experience in the design of integrated digital circuits, who are familiar with high-level design description languages (verilog, VHDL, etc.) and with workflows leading to the physical implementation of circuits at transistor level. Candidates should have experience in defining and managing design flows for physical implementation, including time analysis, power consumption estimations, digital routing, balancing of different clock domains, hierarchical design, etc. A thorough knowledge of EDA tools is essential.
Marketing and Sales Manager
This profile requires more than 5 years’ experience in the integrated circuit market and sufficient technical knowledge to be able to work with technical engineers on product roadmaps. The main responsibilities are:
- To study the market to identify current trends and future needs.
- To forge close relationships with customers.
- To design and develop marketing plans.
- To run sales operations.
- To guarantee efficient customer support.
Candidates must have a high level of English, a degree in Engineering, excellent communication skills, availability to travel and an in-depth knowledge of the microelectronic IC market. This role also requires a well-organized, autonomous, proactive approach, a persuasive personality and good negotiating skills.
Technicians responsible for physically implementing mixed and analog blocks following a full-custom approach, design rule checking (DRC), layout versus schematic (LVS) checks and extracting routing parasites.